You are both rather uninformed. RAM can enable games to use more c library headers and avoid stack smashing by way of the UPC bussing through the central wafer. The reason why valve doesn’t use this bus path like they CAN is because the propagation delay is not even close to being a bottleneck on the lesser capacity chip but when you have 32gb chip, for example, the sequential NAND configuration doesn’t do any better at allocating memory because the pointers aren’t using malloc() in the transport layer anymore.
You are both rather uninformed. RAM can enable games to use more c library headers and avoid stack smashing by way of the UPC bussing through the central wafer. The reason why valve doesn’t use this bus path like they CAN is because the propagation delay is not even close to being a bottleneck on the lesser capacity chip but when you have 32gb chip, for example, the sequential NAND configuration doesn’t do any better at allocating memory because the pointers aren’t using malloc() in the transport layer anymore.
wtf did I just read?
You okay there, buddy? Not smelling any burnt toast, right?