@wiki_me@lemmy.ml to Hardware@lemmy.mlEnglish • 1 year agoNaxRiscv is a open source out of order RISC-V core written in spinalHDL (a open source hardware description language)github.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10cross-posted to: libre_hardware@lemmy.mlopensource@lemmy.ml
arrow-up11arrow-down1external-linkNaxRiscv is a open source out of order RISC-V core written in spinalHDL (a open source hardware description language)github.com@wiki_me@lemmy.ml to Hardware@lemmy.mlEnglish • 1 year agomessage-square0fedilinkcross-posted to: libre_hardware@lemmy.mlopensource@lemmy.ml